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								///////////////////////////////////////////////////////////////////////////////////
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								// Copyright (C) 2016 F4EXB                                                      //
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								// written by Edouard Griffiths                                                  //
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								//                                                                               //
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								// Integer half-band FIR based interpolator and decimator                        //
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								// This is the even/odd and I/Q stride with double buffering variant             //
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								// This is the SIMD intrinsics code                                              //
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								//                                                                               //
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								// This program is free software; you can redistribute it and/or modify          //
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								// it under the terms of the GNU General Public License as published by          //
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								// the Free Software Foundation as version 3 of the License, or                  //
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											2019-04-11 14:32:15 +02:00
										 
									 
								 
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								// (at your option) any later version.                                           //
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											2016-11-09 03:27:30 +01:00
										 
									 
								 
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								//                                                                               //
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								// This program is distributed in the hope that it will be useful,               //
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								// but WITHOUT ANY WARRANTY; without even the implied warranty of                //
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								// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the                  //
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								// GNU General Public License V3 for more details.                               //
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								//                                                                               //
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								// You should have received a copy of the GNU General Public License             //
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								// along with this program. If not, see <http://www.gnu.org/licenses/>.          //
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								///////////////////////////////////////////////////////////////////////////////////
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								#ifndef SDRBASE_DSP_INTHALFBANDFILTERSTI_H_
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								#define SDRBASE_DSP_INTHALFBANDFILTERSTI_H_
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								#include <stdint.h>
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								#if defined(USE_SSE4_1)
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								#include <smmintrin.h>
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								#endif
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								#include "hbfiltertraits.h"
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								template<uint32_t HBFilterOrder>
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								class IntHalfbandFilterSTIntrinsics
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								{
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								public:
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								    static void work(
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								            int32_t samples[HBFilterOrder][2],
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								            int32_t& iEvenAcc, int32_t& qEvenAcc,
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											int32_t& iOddAcc, int32_t& qOddAcc)
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								    {
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								#if defined(USE_SSE4_1)
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								        int a = HBFIRFilterTraits<HBFilterOrder>::hbOrder - 2; // tip
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								        int b = 0; // tail
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								        const int *h = (const int*) HBFIRFilterTraits<HBFilterOrder>::hbCoeffs;
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								        __m128i sum = _mm_setzero_si128();
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								        __m128i shh, sa, sb;
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								        int32_t sums[4] __attribute__ ((aligned (16)));
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								        for (int i = 0; i < HBFIRFilterTraits<HBFilterOrder>::hbOrder / 16; i++)
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								        {
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								            shh = _mm_set_epi32(h[4*i], h[4*i], h[4*i], h[4*i]);
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								            sa = _mm_load_si128((__m128i*) &(samples[a][0])); // Ei,Eq,Oi,Oq
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								            sb = _mm_load_si128((__m128i*) &(samples[b][0]));
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								            sum = _mm_add_epi32(sum, _mm_mullo_epi32(_mm_add_epi32(sa, sb), shh));
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								            a -= 2;
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								            b += 2;
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								            shh = _mm_set_epi32(h[4*i+1], h[4*i+1], h[4*i+1], h[4*i+1]);
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								            sa = _mm_load_si128((__m128i*) &(samples[a][0])); // Ei,Eq,Oi,Oq
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								            sb = _mm_load_si128((__m128i*) &(samples[b][0]));
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								            sum = _mm_add_epi32(sum, _mm_mullo_epi32(_mm_add_epi32(sa, sb), shh));
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								            a -= 2;
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								            b += 2;
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								            shh = _mm_set_epi32(h[4*i+2], h[4*i+2], h[4*i+2], h[4*i+2]);
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								            sa = _mm_load_si128((__m128i*) &(samples[a][0])); // Ei,Eq,Oi,Oq
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								            sb = _mm_load_si128((__m128i*) &(samples[b][0]));
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								            sum = _mm_add_epi32(sum, _mm_mullo_epi32(_mm_add_epi32(sa, sb), shh));
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								            a -= 2;
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								            b += 2;
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								            shh = _mm_set_epi32(h[4*i+3], h[4*i+3], h[4*i+3], h[4*i+3]);
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								            sa = _mm_load_si128((__m128i*) &(samples[a][0])); // Ei,Eq,Oi,Oq
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								            sb = _mm_load_si128((__m128i*) &(samples[b][0]));
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								            sum = _mm_add_epi32(sum, _mm_mullo_epi32(_mm_add_epi32(sa, sb), shh));
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								            a -= 2;
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								            b += 2;
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								        }
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								        // Extract values from sum vector
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								        _mm_store_si128((__m128i*) sums, sum);
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								        iEvenAcc = sums[0];
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								        qEvenAcc = sums[1];
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								        iOddAcc = sums[2];
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								        qOddAcc = sums[3];
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								#endif
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								    }
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								    // not aligned version
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								    static void workNA(
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								            int ptr,
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								            int32_t samples[HBFilterOrder*2][2],
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								            int32_t& iEvenAcc, int32_t& qEvenAcc,
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								            int32_t& iOddAcc, int32_t& qOddAcc)
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								    {
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								#if defined(USE_SSE4_1)
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								        int a = ptr + HBFIRFilterTraits<HBFilterOrder>::hbOrder - 2; // tip
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								        int b = ptr + 0; // tail
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								        const int *h = (const int*) HBFIRFilterTraits<HBFilterOrder>::hbCoeffs;
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								        __m128i sum = _mm_setzero_si128();
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								        __m128i shh, sa, sb;
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								        int32_t sums[4] __attribute__ ((aligned (16)));
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								        for (int i = 0; i < HBFIRFilterTraits<HBFilterOrder>::hbOrder / 16; i++)
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								        {
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								            shh = _mm_set_epi32(h[4*i], h[4*i], h[4*i], h[4*i]);
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								            sa = _mm_loadu_si128((__m128i*) &(samples[a][0])); // Ei,Eq,Oi,Oq
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								            sb = _mm_loadu_si128((__m128i*) &(samples[b][0]));
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								            sum = _mm_add_epi32(sum, _mm_mullo_epi32(_mm_add_epi32(sa, sb), shh));
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								            a -= 2;
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								            b += 2;
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								            shh = _mm_set_epi32(h[4*i+1], h[4*i+1], h[4*i+1], h[4*i+1]);
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								            sa = _mm_loadu_si128((__m128i*) &(samples[a][0])); // Ei,Eq,Oi,Oq
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								            sb = _mm_loadu_si128((__m128i*) &(samples[b][0]));
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								            sum = _mm_add_epi32(sum, _mm_mullo_epi32(_mm_add_epi32(sa, sb), shh));
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								            a -= 2;
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								            b += 2;
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								            shh = _mm_set_epi32(h[4*i+2], h[4*i+2], h[4*i+2], h[4*i+2]);
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								            sa = _mm_loadu_si128((__m128i*) &(samples[a][0])); // Ei,Eq,Oi,Oq
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								            sb = _mm_loadu_si128((__m128i*) &(samples[b][0]));
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								            sum = _mm_add_epi32(sum, _mm_mullo_epi32(_mm_add_epi32(sa, sb), shh));
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								            a -= 2;
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								            b += 2;
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								            shh = _mm_set_epi32(h[4*i+3], h[4*i+3], h[4*i+3], h[4*i+3]);
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								            sa = _mm_loadu_si128((__m128i*) &(samples[a][0])); // Ei,Eq,Oi,Oq
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								            sb = _mm_loadu_si128((__m128i*) &(samples[b][0]));
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								            sum = _mm_add_epi32(sum, _mm_mullo_epi32(_mm_add_epi32(sa, sb), shh));
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								            a -= 2;
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								            b += 2;
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								        }
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								        // Extract values from sum vector
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								        _mm_store_si128((__m128i*) sums, sum);
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								        iEvenAcc = sums[0];
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								        qEvenAcc = sums[1];
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								        iOddAcc = sums[2];
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							 | 
							
							
								        qOddAcc = sums[3];
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								#endif
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								    }
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								};
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							| 
								
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								#endif /* SDRBASE_DSP_INTHALFBANDFILTERSTI_H_ */
							 |