VE7UWU/sdrangel
1
0
Fork 0
mirror of https://github.com/f4exb/sdrangel.git synced 2026-06-02 06:04:39 -04:00
Code Issues Projects Releases Wiki Activity

Implemented shifted interpolators by 64 and fixed some shifted interpolators inf/sup chains

Browse Source
This commit is contained in:
f4exb
2019-04-01 03:24:45 +02:00
parent b3b7c54b78
commit bfcfe8f87c
2 changed files with 142 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files
plugins/samplesink/hackrfoutput/hackrfoutputthread.cpp
+6 -6
View File
@@ -145,9 +145,9 @@ void HackRFOutputThread::callback(qint8* buf, qint32 len)
case 5:
m_interpolators.interpolate32_inf(&beginRead, buf, len);
break;
// case 6:
// m_interpolators.interpolate64_cen(&beginRead, buf, len);
// break;
case 6:
m_interpolators.interpolate64_inf(&beginRead, buf, len);
break;
default:
break;
}
@@ -171,9 +171,9 @@ void HackRFOutputThread::callback(qint8* buf, qint32 len)
case 5:
m_interpolators.interpolate32_sup(&beginRead, buf, len);
break;
// case 6:
// m_interpolators.interpolate64_cen(&beginRead, buf, len);
// break;
case 6:
m_interpolators.interpolate64_sup(&beginRead, buf, len);
break;
default:
break;
}