VE7UWU/sdrangel
1
0
Fork 0
mirror of https://github.com/f4exb/sdrangel.git synced 2025-10-24 09:30:22 -04:00
Code Issues Projects Releases Wiki Activity
6,824 Commits 5 Branches 374 Tags
Commit Graph

4 Commits

Author SHA1 Message Date
Jon Beniston
5d5b221e83 Add Costas Loop PLL in Channel Analyzer 
Add loop bandwidth and other PLL controls to Channel Analyzer GUI.
Fix bug where PLL lock frequency would be incorrect by the decimation
factor.
 2021-03-05 13:37:49 +00:00
f4exb
b49e68e77b Channel Analyzer: refactoring of classes and downsampling chain reorganization 2019-11-24 10:15:23 +01:00
f4exb
ef15157a50 Fixed incomplete copyright headers (1) 2019-04-11 06:39:30 +02:00
f4exb
e24e924d2b Renamed Channel Analyzer NG to Channel Analyzer (2) 2018-05-30 15:42:33 +02:00