 f4exb
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fc49bd2855
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ixed incomplete copyright headers (3): sdrbase
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2019-04-11 14:32:15 +02:00 |
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f4exb
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48cac5385b
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PLL lock indication fixes
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2018-05-20 03:50:22 +02:00 |
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f4exb
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9f48378677
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Channel analyzer NG: return of the lock status indicator and PLL frequency shift for PSK modulated signals
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2018-05-18 19:03:54 +02:00 |
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f4exb
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e723764376
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New PLL: removed locked status heuristics for order > 1
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2018-05-17 02:35:06 +02:00 |
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f4exb
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c495f82235
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Imported Iowa Hills Software IIR and FIR calculator
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2018-05-17 00:09:56 +02:00 |
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f4exb
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d38d926a87
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New PLL: simple FLL code to be put in its own class later
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2018-05-16 18:53:16 +02:00 |
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f4exb
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a1a2078d7d
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New PLL: experimental lock condition algorithm based on phi hat averaging (2) + FLL input and locking mechanixm
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2018-05-16 14:20:26 +02:00 |
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f4exb
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10c56fc47a
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New PLL: experimental lock condition algorithm based on phi hat averaging
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2018-05-16 08:42:08 +02:00 |
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f4exb
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660d8d22ae
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New PLL: heuristics to find locked state
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2018-05-16 01:57:16 +02:00 |
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f4exb
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bb2d530122
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New PLL: phase lock status draft
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2018-05-15 19:40:53 +02:00 |
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f4exb
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68c50769fe
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New PLL: implemented trick on the phase comparator for M-ary PSK operation
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2018-05-14 19:14:30 +02:00 |
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f4exb
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1549ecaa0f
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New PLL with complex signal input and w, zeta, K parameters
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2018-05-13 08:55:14 +02:00 |
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